Part Number: LM76202-Q1 I am developing a design using two LM76202-Q1s in a diode-OR configuration. The inputs to the two units are potentially independent (for redundancy), depending on end-user wiring harness configuration. Should the RTN plane of each LM76202 be separate, or is it acceptable to join the planes to create a single RTN plane? Are any protections sacrificed if they are joined? The motivation for joining them would be for increased thermal dissipation in the critical case of one unit taking the full current load.
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Forum post: LM76202-Q1: Should RTN plane be shared between multiple units?
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Forum post: UCD90160: logic controlled GPO failed somehow
Part Number: UCD90160 Hi Team, is there any sequence or timing restriction for logic controlled GPO? or others limitation? we found that the GPO may fail to turn active when all of input signals are satisfied, but the GPO status can be changed through change the output mode(active driver/open drain) or even change the delay time from 20ms to 0ms (the GPO status change at all of input signal are all stable DC) Not all of the boards show the same thing, some of the boards may see this problem easily but others not. here is the setting in GUI (the PCD_SLP_S3_R_N has been set to active low already) here is the waveform with all input signals above here is the waveform with failed GPO(CH1) here is the waveform with expected GPO (we can get good GPO waveform somehow with AC power cycle)
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Forum post: TLV61225: Diode Drop During Shutdown
Part Number: TLV61225 Hi Team, Are you able to provide the expected voltage drop of the diode when the device is in shutdown mode? I was not able to find this in the datasheet, but am not sure if I missed it. this would be for an application boost a 2S alkaline battery to 3.3 V with a load current of 50 mA, Thanks for the info! Regards, Garret
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Forum post: TPS54560-Q1: TPS54560-Q1
Part Number: TPS54560-Q1 We are using the TPS54560-Q1 down-converter in our design pretty successfully, however a new set of boards arrived and about a 1/3rd of them the device blew up when applying power (52Vdc). Can you suggest what is happening? Also, I noticed there is a TPS54560B-Q1 part, what is the difference between the to parts? Thank you, John
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Forum post: RE: LM5141-Q1: Details required to procees the worst case analysis
Hi Iven, Thanks for the reply. Reg PSPICE file, the file is encrypted So I can't build in TINA. Can u tell me how to import the PSPICE library of LM5141 into TINA for analysis. Regards, Harikrishnan Thangamani
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Forum post: RE: LM5161: VIN
Hi, It's on dropout condition, the device will work with minimum off time with a frequency fold-back. You can refer to 8.2.1.2.3 on datasheet, also you can download its model and simulate it. Thanks.
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Forum post: RE: BQ40Z80: BQ40Z80 How to do manual cell balancing ?
Hello Kang , Thanks for your advice but i have read the page 71 of the TRM that is about cell balancing before. But I guess it is about automatic cell balacing after learning cycle( ex : when update status = 0E bq40z80 calculates cell balance time ). I want to use manual cell balancing without learning cycle. when I want to do cell balancing, I want to do cell balancing manually . Is it possible in bq40z80 ? I can do cell balancing manually when I want in bq77PL900. Thanks. Best regards.
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Forum post: RE: BQ24002: BQ24002 input current
thank you so when input cuurent is 1mA, the output current can reach to 60mA-1A, is it right? best ragards
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Forum post: RE: BOOST-LP5569EVM: LEDs FAULT DETECTION testing - No flag detection
Hi Wu, yes, we have followed the steps 1-10 before/after configuring the SRAM to make sure to do not run the test in the wrong functional status of the FSM. Xould you share an example of code we can import to make sure we don;t implement a wrong R/W access to the registers of the device? it is possible that a wrong drv_headroom[1:0] value can influence the setting of such flags? Thanks Regards Umberto
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Forum post: RE: LM5145: LM5145 Application
Hi, You can have it tried on inverting buck-boost topology, or you can achieve it in a simple way with a MOSFET integrated device. Please refer to the below application note: http://www.ti.com/lit/an/snva856/snva856.pdf
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Forum post: UC3525A: the different between UC3525A & UC3525B
Part Number: UC3525A Hi Support team May I know the the different between UC3525A & UC3525B
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Forum post: BQ40Z50-R1: VOK and R_DIS
Part Number: BQ40Z50-R1 Hello Steven My question is in the relax mode,only VOK is clear at the time of qmax update,but in the learning cycle manual both VOK and R_DIS bits clear for QMAX updates,and VOK is not set at the beginning of discharge. in our cycle resistance updates is not occurred. learning cycle failed. please suggest me how to control VOK and R_DIS bits for the cycle.
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Forum post: RE: Can the TPS65131EVM-063 operate under these conditions?
Hello, TPS65131 device can support maximum voltage of +/-15V so it cannot support 18V. At Vin=3.6V and Vpos/neg=+/- 15V, the conversion ratio will be high enough that it will not be able to support 500mA load current. Kind Regards, Liaqat
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Forum post: RE: LM5161: Minimum switching frequency or maximum Ron value
Hi, Yes, you are right, but we actually don't have a very accurate minimum switching frequency to recommend. It will not only affect boot voltage drop but many designs of the circuit. Maybe you can use the model to have some simulations but I think 300kHz is fine, since you really don't need a lower frequency to make your components very big size. Thanks.
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Forum post: RE: TPS65218: LDO - Output observed at 2.2V and Oscillating. DC-DC output only 500mV
Brian, As TI team pointed out, the GND pad of IC was not getting connected to board's GND. After rework, the PMIC output was working good as expected. Thank you very much for your help ! Regards, Aravind
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Forum post: RE: BQ2000T: Configuring the TS input to the bq2000T for ⊿T/⊿t Termination
Hi Team, This is kindly reminder about above questions. Regards, Kai
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Forum post: RE: WEBENCH® Tools/TPS62810-Q1: TPS62810-Q1 Webench
Hi Itoh, did you verify this with your customer? I just checked the product folder for the PSpice model which is available there for download and simulation using a Spice based simulator. I also checked Webench and was able to start a simulation there as well as download the design to simulate in TINA-TI. In summary I cannot find the problem. All tools work for me as expected. Best regards, Juergen
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Forum post: RE: LM5576: Ripple issues
Hi, The output voltage is 12V, so these capacitors with 16V rating will have much de-rating. You can just change to using some capacitors with higher voltage. That will help, thanks.
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Forum post: RE: UCC27517A: Mosfet Source to IC Ground connection when there is Current Sense resistor between MOSFET source and Battery Ground (BMS)
Thanks a lot Mamadou for the details. Tested in this configuration and it is working fine. Regards, Anil
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Forum post: RE: BQ40Z80: BQ40Z80 automatically shutdown FETs when error occurs
Hello Kang , I want to use protections in general and use FETs too. I want to tell you that if CUV occurs, CUV flag will be set but FETs will not be closed automatically by bq40z80. Is it possible in bq40z80? Following picture is in bq77PL900.If i could click disable automatic DSG FET control in UV and then if CUV occured , flag was set but FETs were not closed automatically. Thanks. Best regards.
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