Hi,
The TPS54140 datasheet shows a recommended input network for the RT/CLK pin in Figure 43.
This network puts a 50 ohm load across the clock source. This is rather a large load (i.e. low resistance) for driving from an on board clock generator.
This text in the datasheet says that the network is designed so that the TPS54140 will revert to using Rfset for the frequency if the external clock stops. However I think this is only valid if the clock stops in the low state, or is disconnected. If the clock stops in the high state then Rfset will be connected to the wrong voltage.
I'm wondering if the network was designed for use on an evaluation board with a connector that is intended for connection to a bench signal generator. In this case it clearly makes sense for the cicruit to be designed so that the TPS54140 will work with no generator connected.
As far as I can see the network is not really appropriate for on board clock generator (which should always be working, and if it isn't then it's output is just as likely to be high as it is to be low).
I'm tempted just to connect a 3.3V logic level square wave into the RT/CLK input.
Am I missing some reason why I really should use the network from 43?
Thanks for any help,
Tim