Does anyone know how the expression in equation (14) of the TPS55010 data sheet (SLVSAV0A - June 2011) was derived? I've done some simulations which seem OK when this value is (even greatly) exceeded. Problems do arise when the leakage inductance becomes too large however, so that sets a practical upper limit, but unrelated to the value given by the expression.
I'm wondering if it is derived from minimising the transformer resistance and core losses? Maybe in due course there will be a definitive analysis of the fly-buck topology, but I've not yet found one...
Keith