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Forum Post: RE: BQ77910A recovery from OC (Over Current) and SCD (Short circuit discharge)

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Hi Ran,

Your evaluation software screen capture shows some differences between the registers and the EEPROM values. It appears some values were changed but not written to EEPROM. The part operates from the EEPROM.

You have SOR =1 so overcurrent recover requires both load removal (DPCKN low) and CHGST high.  One thing that can happen in a pack with the bq77910A is that a high capacitive load may not change voltage quickly after OC protection, so DPCKN does not rise quickly and the IC sees load removal too early.  If the pack has a separate CHGST control line, the part may still be prevented from recovering by CHGST low, as you have configured.  If CHGST is high, the IC can see both load removal and CHGST high and recover automatically causing cycling. Higher current such as a definite short circuit usually allows DPCKN to rise faster for more certain load removal, you might check if your load responds slower at higher current though.

However load present is not a fault and normal operation including wakeup does not require load removal.  If your higher current induces a reset of the part, the FETs turn off.  If CHGST is high or pulses high, the part can start up again and will close the FETs if there are no faults.  This will result in the FETs cycling, but the off time will be the startup time instead of the shorter recovery time.  Causes of reset might include noise coupled onto VREG, noise on ground affecting VREG, or a rapid rate of change on BAT.  See www.ti.com/lit/slua612

Noise coupled onto ZEDE making the pin momentarily high may also allow the part to go to minimum delay mode and trip without waiting the entire delay time.  Polling as your evaluation software capure shows may also cause cycling if the current is above a threshold or has noise/surges above the threshold.  Polling cycling will show up at the polling interval, although if the load is above the OC threshold may show mostly OCD timing interspersed with shorter ZEDE induced timing.  Since your capture does not show OC faults, you either did not capture during cycling or do not poll durig cycling.

So in general:

  • Be sure it is a protection and not a reset
  • Check for transients on control lines
  • Check to see if load detection is 'high', load detection can be before protection.
  • Best IC functionality is if CHGST is controlled (indicates charger is connected)
  • No status polling during test

 


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