Hi Guys,
I am still doing the background reading that I feel I need to do before I start my paper and pen design of my converter. In the meantime, I have one quick question. In some of the boost controllers with an external NFET (i.e. TPS43060), the parameter table (where we select parts) shows a limit on Vout.
I'm trying to understand how limits on Vout fit into the picture when the FET is external. For applications where there is only a low-side switch, the output voltage would be on the drain of the FET, and the controller would never see it, right? The controller would only see the gate voltage on the FET, so it shouldn't care what the FET drain voltage is.
When a limit on Vout is stated for the controllers with external FETs, should we assume that this controller uses another (2nd) external FET, and that maybe this one is a high side FET, and in this case, Vout can touch silicon inside the controller (so it does have to be limited)?
For my application, a simple boost, with one external low side FET, is Vout a "don't care" parameter?
Thanks!!
David