Hello,
I'm designing a power supply to step down a voltage from 4V to 15V down to 3.3V. I have the design in the lab working well, but I have an issue with the soft-start circuit where I believe the FSS resistor connected from EN/SS to BP is biasing the soft-start capacitor as well as the intentional 10µA current source. This in turn is cutting my desired soft start time by at least 3, hence triggering the over-current upon start-up.
Can someone verify that I am correct in this thinking? With a 0.33µF capacitor on the EN/SS I expect ~20ms of soft start. When the FSS 267k resistor is attached from EN/SS to BP this turns into ~7ms of soft-start.
If this is the case, nothing is stated in the datasheet. I would expect somewhere in the datasheet to state, "Hey, if you use the FSS resistor use this equation for your soft start calculation" I don't know the equation since I just simulated in SPICE instead to obtain my above example numbers.
Lastly, the block diagram does not do a good job in showing the LDRV and HDRV over current sensing. If I read the data sheet correctly this is a measurement of the VDS voltage on the upper and lower MOSFET during a switch cycle. I'm taking it that is a measurement from VDD? - SW for the high side and SW - GND for the low side. The block diagram doesn't show this well, and I can't imagine it being terribly accurate since VDD could be pretty far from the high side MOSFET. The low side MOSFET should be a little a more accurate.
Thanks,
Adam